SVUT is a simple framework to create Verilog/SystemVerilog unit tests. Just focus on your tests!

Python Verilog value change dump (VCD) parser library + the nifty vcdcat VCD command line pretty printer.

Python library for operations with VCD and other digital wave files

VCD visualizer: view your waveforms in ASCII format, or export them to TikZ figures.

A Value Change Dump (VCD) file parser and analyzer

An interactive digital logic simulator with verilog support (Yosys)

converts ValueChangeDump-Files (vcd) to tikz-timing-diagrams

micro version of cocotb, to run on microcontrollers or desktop to get hardware in the loop

Python classes to create agnostic wave files for HDL simulator viewer

LUMext is a vCD UI & API extension to manage LDAP-based organisation's users and groups through VMware vCloud Director.

Convert fsdb/vcd file to json(wavedrom format) and svg

VCDcompare - a tool to support when modifying an HDL module

includes REST and other API methods to connect with various VMware Products

a fundamental Python package for digital circuit waveform analysis

VCD dumper, UART & PS2 analyser

A cross-platform tool to visualize time series.

Dave McEwan's Personal Python Library

A tool to set up your POPS!

VMware vCD/IBM Cloud IAM SSO integration CLI