A modern hardware definition language and toolchain based on Python
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Feb 8, 2025 - Python
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hdl
Here are 676 public repositories matching this topic...
HDL libraries and projects
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Mar 3, 2025 - Verilog
Hardware Description Languages
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Feb 7, 2025
A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen
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Jan 8, 2022 - Python
Veryl: A Modern Hardware Description Language
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Mar 3, 2025 - Rust
一篇全面的 Bluespec SystemVerilog (BSV) 中文教程，介绍了BSV的调度、FIFO数据流、多态等高级特性，展示了BSV相比于传统Verilog开发的优势。
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Sep 15, 2023 - Bluespec
The Rapid Open Hardware Development (ROHD) framework is a framework for describing and verifying hardware in the Dart programming language.
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Feb 20, 2025 - Dart
Pymtl 3 (Mamba), an open-source Python-based hardware generation, simulation, and verification framework
python rtl verilog systemverilog hdl open-source-hardware pymtl hardware-generation open-source-eda multi-level-modeling cycle-level-modeling
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Feb 27, 2025 - Python
Open source machine learning accelerators
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Mar 24, 2024 - Scala
PlutoSDR Firmware
linux fpga sdr iio transceiver rf hdl plutosdr adalm-pluto active-learning-module plutosdr-fw plutosdr-firmware
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Oct 15, 2024 - Shell
VeloView performs real-time visualization and easy processing of live captured 3D LiDAR data from Velodyne sensors (Alpha Prime™, Puck™, Ultra Puck™, Puck Hi-Res™, Alpha Puck™, Puck LITE™, HDL-32, HDL-64E). Runs on Windows, Linux and MacOS. This repository is a mirror of https://gitlab.kitware.com/LidarView/VeloView-Velodyne.
lidar velodyne-sensor velodyne sensor-data hdl lidar-measurements lidar-data-manipulation lidar-camera-calibration velodyne-hdl-sensors sensor-streaming
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Sep 29, 2021 - C++
Test suite designed to check compliance with the SystemVerilog standard.
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Feb 28, 2025 - SystemVerilog
A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
asic fpga async verification verilog synthesis icarus-verilog fifo cdc hdl verilog-hdl fifo-queue fifo-cache verilator asic-design cross-clock-domain
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Apr 30, 2024 - Verilog
Reviewing some online CS courses I took
javascript ruby kotlin python c java scala networking algorithms racket assembly computer-graphics logic mathematics databases programming-languages nand2tetris operating-systems hdl smlnj
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Oct 5, 2024 - JavaScript
FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
python toolchain documentation fpga sphinx primitives verilog synthesis lattice hdl xilinx-fpga ice40 artix7 artix vpr kintex7 architecture-definitions verilog-simulator symbiflow verilog-simulations
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Mar 2, 2025 - Jupyter Notebook
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