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[svsim] Fix initial ordering issue (#4614)
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Fix a bug in svsim where the entire simulation is run inside an `initial`
block from a generated testbench.  This creates undefined simulation
ordering with `initial` blocks in the simulated modules.  Fix this by
switching to an explicit state machine inside the testbench.

Fixes #3962.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
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seldridge authored Jan 14, 2025
1 parent 757b9c0 commit ab7c417
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Showing 4 changed files with 59 additions and 2 deletions.
10 changes: 8 additions & 2 deletions svsim/src/main/scala/Workspace.scala
Original file line number Diff line number Diff line change
Expand Up @@ -141,8 +141,14 @@ final class Workspace(
}
l(" // Simulation")
l(" import \"DPI-C\" context task simulation_body();")
l(" initial begin")
l(" simulation_body();")
l(" enum {INIT, RUN, DONE} simulationState = INIT;")
l(" initial")
l(" simulationState = RUN;")
l(" always @(simulationState) begin")
l(" if (simulationState == RUN) begin")
l(" simulation_body();")
l(" simulationState = DONE;")
l(" end")
l(" end")
l(" `ifdef ", Backend.HarnessCompilationFlags.supportsDelayInPublicFunctions)
l(" export \"DPI-C\" task run_simulation;")
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12 changes: 12 additions & 0 deletions svsim/src/test/resources/Initial.sv
Original file line number Diff line number Diff line change
@@ -0,0 +1,12 @@
// SPDX-License-Identifier: Apache-2.0

module Initial(output b);

reg a = 1'b0;

assign b = a;

initial
a = 1'b1;

endmodule
24 changes: 24 additions & 0 deletions svsim/src/test/scala/BackendSpec.scala
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,7 @@ import org.scalatest.funspec.AnyFunSpec
import org.scalatest.matchers.must.Matchers
import svsim._
import java.io.{BufferedReader, FileReader}
import svsimTests.Resources.TestWorkspace

class VCSSpec extends BackendSpec {
import vcs.Backend.CompilationSettings._
Expand Down Expand Up @@ -272,6 +273,29 @@ trait BackendSpec extends AnyFunSpec with Matchers {
}
}
}

it("handles initial statements correctly (#3962)") {
workspace.reset()
workspace.elaborateInitialTest()
workspace.generateAdditionalSources()
simulation = workspace.compile(
backend
)(
workingDirectoryTag = name,
commonSettings = CommonCompilationSettings(),
backendSpecificSettings = compilationSettings,
customSimulationWorkingDirectory = None,
verbose = false
)
simulation.run(
verbose = false,
executionScriptLimit = None
) { controller =>
controller.port("b").check(isSigned = false) { value =>
assert(value.asBigInt === 1)
}
}
}
}
}
}
15 changes: 15 additions & 0 deletions svsim/src/test/scala/Resources.scala
Original file line number Diff line number Diff line change
Expand Up @@ -116,5 +116,20 @@ object Resources {
)
)
}
def elaborateInitialTest(): Unit = {
workspace.addPrimarySourceFromResource(getClass, "/Initial.sv")
workspace.elaborate(
ModuleInfo(
name = "Initial",
ports = Seq(
new ModuleInfo.Port(
name = "b",
isSettable = false,
isGettable = true
)
)
)
)
}
}
}

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