Move recovery register interface on the AXI bus

This also adds the offset in the soc_ifc registers.

Signed-off-by: Arthur Heymans <arthur.heymans@9elements.com>

hw-model/src/model_emulated.rs

@@ -297,8 +297,9 @@ impl HwModel for ModelEmulated {
         self.step();
     }
 
+    // [TODO][CAP2] Should it be statically provisioned?
     fn put_firmware_in_rri(&mut self, firmware: &[u8]) -> Result<(), ModelError> {
-        self.cpu.bus.bus.recovery.cms_data = Some(Rc::new(firmware.to_vec()));
+        self.cpu.bus.bus.dma.axi.recovery.cms_data = Some(Rc::new(firmware.to_vec()));
         Ok(())
     }
 }

sw-emulator/lib/periph/src/dma.rs

@@ -26,6 +26,7 @@ use tock_registers::register_bitfields;
 
 pub mod axi_root_bus;
 use axi_root_bus::{AxiAddr, AxiRootBus};
+mod recovery;
 
 register_bitfields! [
     u32,

sw-emulator/lib/periph/src/dma/axi_root_bus.rs

@@ -12,34 +12,59 @@ Abstract:
 
 --*/
 
-use caliptra_emu_types::{RvData, RvSize};
-use caliptra_emu_bus::{Register, BusError::StoreAccessFault, BusError::LoadAccessFault, BusError};
+use caliptra_emu_bus::{
+    Bus, BusError, BusError::LoadAccessFault, BusError::StoreAccessFault, Register,
+};
+use caliptra_emu_types::{RvAddr, RvData, RvSize};
 
 pub type AxiAddr = u64;
 
+use crate::dma::recovery::RecoveryRegisterInterface;
+
 pub struct AxiRootBus {
     pub reg: u32,
+
+    pub recovery: RecoveryRegisterInterface,
+}
+
+impl Default for AxiRootBus {
+    fn default() -> Self {
+        Self::new()
+    }
 }
 
 impl AxiRootBus {
     const TEST_REG_OFFSET: AxiAddr = 0xaa00;
+    pub const RECOVERY_REGISTER_INTERFACE_OFFSET: AxiAddr = 0xf_00000000;
+    pub const RECOVERY_REGISTER_INTERFACE_END: AxiAddr = 0xf_000000ff;
 
     pub fn new() -> Self {
-        Self { reg: 0xaabbccdd }
+        Self {
+            reg: 0xaabbccdd,
+            recovery: RecoveryRegisterInterface::new(),
+        }
     }
 
     pub fn read(&mut self, size: RvSize, addr: AxiAddr) -> Result<RvData, BusError> {
         match addr {
             Self::TEST_REG_OFFSET => return Register::read(&self.reg, size),
+            Self::RECOVERY_REGISTER_INTERFACE_OFFSET..=Self::RECOVERY_REGISTER_INTERFACE_END => {
+                let addr = (addr - Self::RECOVERY_REGISTER_INTERFACE_OFFSET) as RvAddr;
+                return Bus::read(&mut self.recovery, size, addr);
+            }
             _ => {}
-        }
+        };
 
         Err(LoadAccessFault)
     }
 
     pub fn write(&mut self, size: RvSize, addr: AxiAddr, val: RvData) -> Result<(), BusError> {
         match addr {
             Self::TEST_REG_OFFSET => return Register::write(&mut self.reg, size, val),
+            Self::RECOVERY_REGISTER_INTERFACE_OFFSET..=Self::RECOVERY_REGISTER_INTERFACE_END => {
+                let addr = (addr - Self::RECOVERY_REGISTER_INTERFACE_OFFSET) as RvAddr;
+                return Bus::write(&mut self.recovery, size, addr, val);
+            }
             _ => {}
         }
 

sw-emulator/lib/periph/src/lib.rs

@@ -27,7 +27,6 @@ mod iccm;
 mod key_vault;
 mod mailbox;
 mod ml_dsa87;
-mod recovery;
 mod root_bus;
 mod sha512_acc;
 pub mod soc_reg;

sw-emulator/lib/periph/src/root_bus.rs

@@ -17,7 +17,6 @@ use crate::{
     helpers::words_from_bytes_be,
     iccm::Iccm,
     ml_dsa87::Mldsa87,
-    recovery::RecoveryRegisterInterface,
     soc_reg::{DebugManufService, SocRegistersExternal},
     AsymEcc384, Csrng, Doe, EmuCtrl, HashSha256, HashSha512, HmacSha, KeyVault, MailboxExternal,
     MailboxInternal, MailboxRam, Sha512Accelerator, SocRegistersInternal, Uart,
@@ -272,10 +271,6 @@ pub struct CaliptraRootBus {
     #[peripheral(offset = 0x1003_0000, mask = 0x0000_ffff)]
     pub ml_dsa87: Mldsa87,
 
-    // We set I3C at 0x1004_0000 and EC is at 0x100 offset
-    #[peripheral(offset = 0x1004_0100, mask = 0x0000_7fff)] // TODO
-    pub recovery: RecoveryRegisterInterface,
-
     #[peripheral(offset = 0x4000_0000, mask = 0x0fff_ffff)]
     pub iccm: Iccm,
 
@@ -342,7 +337,6 @@ impl CaliptraRootBus {
             sha512,
             sha256: HashSha256::new(clock),
             ml_dsa87: Mldsa87::new(clock, key_vault.clone()),
-            recovery: RecoveryRegisterInterface::new(),
             iccm,
             dccm: Ram::new(vec![0; Self::DCCM_SIZE]),
             uart: Uart::new(),

sw-emulator/lib/periph/src/soc_reg.rs

@@ -702,6 +702,12 @@ struct SocRegistersImpl {
     #[register_array(offset = 0x34c)]
     fuse_manuf_dbg_unlock_token: [u32; FUSE_MANUF_DBG_UNLOCK_TOKEN_SIZE / 4],
 
+    #[register(offset = 0x510)]
+    ss_recovery_ifc_base_addr_l: ReadOnlyRegister<u32>,
+
+    #[register(offset = 0x514)]
+    ss_recovery_ifc_base_addr_h: ReadOnlyRegister<u32>,
+
     #[register(offset = 0x520)]
     ss_uds_seed_base_addr_l: ReadOnlyRegister<u32>,
 
@@ -846,6 +852,8 @@ impl SocRegistersImpl {
         let flow_status = InMemoryRegister::<u32, FlowStatus::Register>::new(0);
         flow_status.write(FlowStatus::READY_FOR_FUSES.val(1));
 
+        let rri_offset = crate::dma::axi_root_bus::AxiRootBus::RECOVERY_REGISTER_INTERFACE_OFFSET;
+
         let regs = Self {
             cptra_hw_error_fatal: ReadWriteRegister::new(0),
             cptra_hw_error_non_fatal: ReadWriteRegister::new(0),
@@ -906,6 +914,8 @@ impl SocRegistersImpl {
             fuse_mldsa_revocation: Default::default(),
             fuse_soc_stepping_id: ReadWriteRegister::new(0),
             fuse_manuf_dbg_unlock_token: [0; 4],
+            ss_recovery_ifc_base_addr_l: ReadOnlyRegister::new(rri_offset as u32),
+            ss_recovery_ifc_base_addr_h: ReadOnlyRegister::new((rri_offset >> 32) as u32),
             internal_obf_key: args.cptra_obf_key,
             internal_iccm_lock: ReadWriteRegister::new(0),
             internal_fw_update_reset: ReadWriteRegister::new(0),