v2.0-rc4

What's Changed

• Makefile: Avoid diff error by @jones-drew in #121
• Few changes before SBI v2 public review by @avpatel in #120
• Various cleanups by @atishp04 in #122

v2.0-rc3

• CI support added
• Fix revmark in the makefile.
• Few minor cleanups.

v2.0-rc2

Change log:
• Addressed most of the ARC committee's feedback.
• Added clarification for SUSP, NACL & STA extensions.
• Standardization of hart usage.
• Added an error code in SBI DBCN extension.

v2.0-rc1

Version 2.0-rc1
Added common description for shared memory physical address range parameter

Added SBI debug console extension

Relaxed the counter width requirement on SBI PMU firmware counters

Added sbi_pmu_counter_fw_read_hi() in SBI PMU extension

Reserved space for SBI implementation specific firmware events

Added SBI system suspend extension

Added SBI CPPC extension

Clarified that an SBI extension can be partially implemented only if it defines a mechanism to discover implemented SBI functions

Added error code SBI_ERR_NO_SHMEM

Added SBI nested acceleration extension

Added common description for a virtual HART

Added SBI steal-time accounting extension

Added SBI PMU snapshot extension

V1.0.0

The SBI specification is ratified now. No changes are allowed in this version. Any desired or needed changes can be the subject of a follow-on document with a revised version number consistent with the RISC-V Versioning policy.

v1.0-rc3

Addressed remaining comments received during the public review.

v1.0-rc2

Addressed most of the comments received during the public review.
Formatting is changed to the RVI specification template.

v1.0-rc1

This tag is the ratification candidate of version v1.0-rc1 of the RISC-V SBI specification. This overwrites the previous version v0.3-rc1 as RVI implemented a policy[1] that every ratified specification must start with v1.0. A new release is created to adapt the ratification process[2] for non-ISA specifications defined by RVI recently. It doesn't have any significant changes other than typos.

This will be official frozen version of the SBI specification and will go into the public review phase soon. The ratified version will have the version number as v1.0 after the public review period and board approval as per the policy [3].

[1] https://docs.google.com/document/d/1ZO3clTdgbm-t6r8GMDQ7CypWl68_3ZeYuHl4e-cS280/edit
[2] https://docs.google.com/document/d/1-UlaSGqk59_myeuPMrV9gyuaIgnmFzGh5Gfy_tpViwM/edit?usp=sharing
[3] https://docs.google.com/presentation/d/1nQ5uFb39KA6gvUi5SReWfIQSiRN7hp6z7ZPfctE4mKk/edit#slide=id.p1

RISC-V SBI Specification v0.3.0

This is the official release for SBI specification v0.3.0. There are only few typo fixes and license text updates added after rc1.
No functional changes have been added after rc1.

RISC-V SBI Specification, release candidate for v0.3

This tag contains the first release candidate of version 0.3.0 of the RISC-V SBI specification. It includes few document styling improvements and following new extensions.

• System reset
• HART suspend
• Performance Monitoring Unit (PMU)

We have tagged this as a release candidate for a wider review. We don't expect any more functional changes in the v0.3.
However, cosmetic and/or semantic changes still can be included if found. We are planning to release the v0.3 in a month time if everything goes well.