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ci: Build SW and simulation binaries with multiple processes
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colluca committed Dec 4, 2023
1 parent abe2277 commit 22ed602
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Showing 2 changed files with 8 additions and 8 deletions.
4 changes: 2 additions & 2 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,7 @@ jobs:
submodules: 'recursive'
- name: Build Software
run: |
make -C target/sim sw
make -C target/sim sw -j
###############################
# Generate Occamy RTL sources #
Expand All @@ -53,4 +53,4 @@ jobs:
submodules: 'recursive'
- name: Generate single-cluster Occamy RTL sources
run: |
make -C target/sim CFG_OVERRIDE=cfg/single-cluster.hjson rtl
make -C target/sim CFG_OVERRIDE=cfg/single-cluster.hjson rtl -j
12 changes: 6 additions & 6 deletions .gitlab-ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -50,9 +50,9 @@ docs:
occamy-single-cluster-vsim:
script:
- cd target/sim
- make CFG_OVERRIDE=cfg/single-cluster.hjson rtl
- make sw
- make bin/occamy_top.vsim
- make CFG_OVERRIDE=cfg/single-cluster.hjson rtl -j
- make sw -j
- make bin/occamy_top.vsim -j
- ./run.py sw/run-single-cluster.yaml --simulator vsim

#####################
Expand All @@ -63,7 +63,7 @@ occamy-single-cluster-vsim:
occamy-full-vsim:
script:
- cd target/sim
- make CFG_OVERRIDE=cfg/full.hjson rtl
- make LENGTH=384 sw
- make bin/occamy_top.vsim
- make CFG_OVERRIDE=cfg/full.hjson rtl -j
- make LENGTH=384 sw -j
- make bin/occamy_top.vsim -j
- ./run.py sw/run-full-occamy.yaml --simulator vsim

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