ci #2172

Job	Run time
riscv-isa-sim	10s
check-control-registers	20s
check-opcodes	5s
tc-gcc	24s
tc-llvm	54s
verilator	11s
verilator-model (minpool)	11s
verilator-model (mempool)	12s
check-bootrom	9s
build-apps-gcc (minpool)	1m 32s
build-apps-gcc (mempool)	1m 41s
unit-test	2m 3s
tc-halide	12s
build-apps-llvm (minpool)	1m 55s
build-apps-llvm (mempool)	1m 52s
run-apps-gcc (minpool)	30s
run-apps-gcc (mempool)	2m 24s
build-apps-halide (minpool)	39s
build-apps-halide (mempool)	36s
run-apps-llvm (minpool)	37s
run-apps-llvm (mempool)	2m 26s
run-apps-halide (minpool)	32s
run-apps-halide (mempool)	3m 1s
clean-up	3s
clean-up-compile-runs (minpool)	4s
clean-up-compile-runs (mempool)	2s
	22m 45s

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