Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

Bootstrap should sync submodules. #23095

Merged
merged 1 commit into from
Oct 11, 2022
Merged

Bootstrap should sync submodules. #23095

merged 1 commit into from
Oct 11, 2022

Conversation

bzbarsky-apple
Copy link
Contributor

When submodule URLs change, re-bootstrap will fail unless something does "git submodule sync". We should just do that as part of bootstrap, instead of assuming that developers know to do it.

Fixes #23059

@github-actions
Copy link

PR #23095: Size comparison from 3b96652 to f0916d5

Increases (2 builds for bl702, telink)
platform target config section 3b96652 f0916d5 change % change
bl702 lighting-app bl702+rpc .debug_info 41811900 41811901 1 0.0
.text 1030732 1030734 2 0.0
telink light-switch-app tlsr9518adk80d text 553142 553144 2 0.0
Full report (5 builds for bl702, telink)
platform target config section 3b96652 f0916d5 change % change
bl702 lighting-app bl702 0 0 0 0.0
(read only) 3262 3262 0 0.0
(read/write) 1188659 1188659 0 0.0
.bleromro 6296 6296 0 0.0
.bleromrw 124 124 0 0.0
.boot2 688 688 0 0.0
.bss 67102 67102 0 0.0
.bss_psram 29696 29696 0 0.0
.comment 48 48 0 0.0
.data 4272 4272 0 0.0
.debug_abbrev 1506865 1506865 0 0.0
.debug_aranges 133128 133128 0 0.0
.debug_frame 486580 486580 0 0.0
.debug_info 37905288 37905288 0 0.0
.debug_line 5256840 5256840 0 0.0
.debug_loc 3367112 3367112 0 0.0
.debug_ranges 359368 359368 0 0.0
.debug_str 3457811 3457811 0 0.0
.hbn 509 509 0 0.0
.hbn_noinit 260 260 0 0.0
.init 342 342 0 0.0
.init_array 144 144 0 0.0
.psram 0 0 0 0.0
.riscv.attributes 47 47 0 0.0
.rodata 116744 116744 0 0.0
.rsvd 3188 3188 0 0.0
.shstrtab 293 293 0 0.0
.stack 2048 2048 0 0.0
.strtab 565071 565071 0 0.0
.symtab 171664 171664 0 0.0
.tcm_data 36 36 0 0.0
.tcmcode 3262 3262 0 0.0
.text 957032 957032 0 0.0
bl702+rpc 0 0 0 0.0
(read only) 3262 3262 0 0.0
(read/write) 1284579 1284579 0 0.0
.bleromro 6296 6296 0 0.0
.bleromrw 124 124 0 0.0
.boot2 688 688 0 0.0
.bss 75150 75150 0 0.0
.bss_psram 29936 29936 0 0.0
.comment 48 48 0 0.0
.data 4800 4800 0 0.0
.debug_abbrev 1644410 1644410 0 0.0
.debug_aranges 140632 140632 0 0.0
.debug_frame 511956 511956 0 0.0
.debug_info 41811900 41811901 1 0.0
.debug_line 5631375 5631375 0 0.0
.debug_loc 3559772 3559772 0 0.0
.debug_ranges 381824 381824 0 0.0
.debug_str 3853711 3853711 0 0.0
.hbn 509 509 0 0.0
.hbn_noinit 260 260 0 0.0
.init 342 342 0 0.0
.init_array 160 160 0 0.0
.psram 0 0 0 0.0
.riscv.attributes 47 47 0 0.0
.rodata 130136 130136 0 0.0
.rsvd 3188 3188 0 0.0
.shstrtab 293 293 0 0.0
.stack 2048 2048 0 0.0
.strtab 624244 624244 0 0.0
.symtab 189472 189472 0 0.0
.tcm_data 36 36 0 0.0
.tcmcode 3262 3262 0 0.0
.text 1030732 1030734 2 0.0
telink light-switch-app tlsr9518adk80d (read/write) 789372 789372 0 0.0
bss 72480 72480 0 0.0
noinit 43520 43520 0 0.0
text 553142 553144 2 0.0
lighting-app tlsr9518adk80d (read/write) 811484 811484 0 0.0
bss 73328 73328 0 0.0
noinit 43520 43520 0 0.0
text 571366 571366 0 0.0
ota-requestor-app tlsr9518adk80d (read/write) 819420 819420 0 0.0
bss 74236 74236 0 0.0
noinit 43520 43520 0 0.0
text 577548 577548 0 0.0

@bzbarsky-apple
Bootstrap should sync submodules.
d85d7e8 
When submodule URLs change, re-bootstrap will fail unless something does "git
submodule sync".  We should just do that as part of bootstrap, instead of
assuming that developers know to do it.

Fixes project-chip#23059
@bzbarsky-apple bzbarsky-apple force-pushed the bootstrap-submodule-sync branch from f0916d5 to d85d7e8 Compare October 10, 2022 22:32
@github-actions
Copy link

github-actions bot commented Oct 10, 2022 •
edited
Loading

PR #23095: Size comparison from 119cdf5 to d85d7e8

Increases (2 builds for telink)
platform target config section 119cdf5 d85d7e8 change % change
telink light-switch-app tlsr9518adk80d text 553144 553146 2 0.0
lighting-app tlsr9518adk80d text 571366 571368 2 0.0
Decreases (4 builds for esp32, psoc6)
platform target config section 119cdf5 d85d7e8 change % change
esp32 all-clusters-app m5stack (read/write) 564212 564204 -8 -0.0
.flash.rodata 314936 314928 -8 -0.0
psoc6 all-clusters cy8ckit_062s2_43012 .debug_info 26831650 26831649 -1 -0.0
all-clusters-minimal cy8ckit_062s2_43012 .debug_info 26568431 26568430 -1 -0.0
light cy8ckit_062s2_43012 .debug_info 22032155 22032154 -1 -0.0
Full report (38 builds for bl602, bl702, cc13x2_26x2, cyw30739, efr32, esp32, k32w, linux, mbed, nrfconnect, psoc6, qpg, telink)
platform target config section 119cdf5 d85d7e8 change % change
bl602 lighting-app bl602 (read/write) 1389654 1389654 0 0.0
.bss 90729 90729 0 0.0
.data 9928 9928 0 0.0
.text 1069060 1069060 0 0.0
bl602+rpc (read/write) 1434866 1434866 0 0.0
.bss 98161 98161 0 0.0
.data 10312 10312 0 0.0
.text 1100408 1100408 0 0.0
bl702 lighting-app bl702 (read only) 3262 3262 0 0.0
(read/write) 1188659 1188659 0 0.0
.bleromro 6296 6296 0 0.0
.bleromrw 124 124 0 0.0
.boot2 688 688 0 0.0
.bss 67102 67102 0 0.0
.bss_psram 29696 29696 0 0.0
.comment 48 48 0 0.0
.data 4272 4272 0 0.0
.debug_abbrev 1506865 1506865 0 0.0
.debug_aranges 133128 133128 0 0.0
.debug_frame 486580 486580 0 0.0
.debug_info 37905288 37905288 0 0.0
.debug_line 5256840 5256840 0 0.0
.debug_loc 3367112 3367112 0 0.0
.debug_ranges 359368 359368 0 0.0
.debug_str 3457811 3457811 0 0.0
.hbn 509 509 0 0.0
.hbn_noinit 260 260 0 0.0
.init 342 342 0 0.0
.init_array 144 144 0 0.0
.psram 0 0 0 0.0
.riscv.attributes 47 47 0 0.0
.rodata 116744 116744 0 0.0
.rsvd 3188 3188 0 0.0
.shstrtab 293 293 0 0.0
.stack 2048 2048 0 0.0
.strtab 565071 565071 0 0.0
.symtab 171664 171664 0 0.0
.tcm_data 36 36 0 0.0
.tcmcode 3262 3262 0 0.0
.text 0 0 0 0.0
957032 957032 0 0.0
bl702+rpc (read only) 3262 3262 0 0.0
(read/write) 1284579 1284579 0 0.0
.bleromro 6296 6296 0 0.0
.bleromrw 124 124 0 0.0
.boot2 688 688 0 0.0
.bss 75150 75150 0 0.0
.bss_psram 29936 29936 0 0.0
.comment 48 48 0 0.0
.data 4800 4800 0 0.0
.debug_abbrev 1644410 1644410 0 0.0
.debug_aranges 140632 140632 0 0.0
.debug_frame 511956 511956 0 0.0
.debug_info 41811901 41811901 0 0.0
.debug_line 5631375 5631375 0 0.0
.debug_loc 3559772 3559772 0 0.0
.debug_ranges 381824 381824 0 0.0
.debug_str 3853711 3853711 0 0.0
.hbn 509 509 0 0.0
.hbn_noinit 260 260 0 0.0
.init 342 342 0 0.0
.init_array 160 160 0 0.0
.psram 0 0 0 0.0
.riscv.attributes 47 47 0 0.0
.rodata 130136 130136 0 0.0
.rsvd 3188 3188 0 0.0
.shstrtab 293 293 0 0.0
.stack 2048 2048 0 0.0
.strtab 624244 624244 0 0.0
.symtab 189472 189472 0 0.0
.tcm_data 36 36 0 0.0
.tcmcode 3262 3262 0 0.0
.text 0 0 0 0.0
1030734 1030734 0 0.0
cc13x2_26x2 all-clusters-app LP_CC2652R7 (read only) 677183 677183 0 0.0
(read/write) 174360 174360 0 0.0
.bss 81236 81236 0 0.0
.data 3380 3380 0 0.0
.rodata 89791 89791 0 0.0
.text 587080 587080 0 0.0
all-clusters-minimal-app LP_CC2652R7 (read only) 641431 641431 0 0.0
(read/write) 158004 158004 0 0.0
.bss 80508 80508 0 0.0
.data 3380 3380 0 0.0
.rodata 78927 78927 0 0.0
.text 562184 562184 0 0.0
lock-ftd LP_CC2652R7 (read only) 675867 675867 0 0.0
(read/write) 172828 172828 0 0.0
.bss 78476 78476 0 0.0
.data 3304 3304 0 0.0
.rodata 77315 77315 0 0.0
.text 598072 598072 0 0.0
lock-mtd LP_CC2652R7 (read only) 659615 659615 0 0.0
(read/write) 184768 184768 0 0.0
.bss 74164 74164 0 0.0
.data 3304 3304 0 0.0
.rodata 103135 103135 0 0.0
.text 556000 556000 0 0.0
pump-app LP_CC2652R7 (read only) 687923 687923 0 0.0
(read/write) 161492 161492 0 0.0
.bss 78428 78428 0 0.0
.data 3296 3296 0 0.0
.rodata 90731 90731 0 0.0
.text 596708 596708 0 0.0
pump-controller-app LP_CC2652R7 (read only) 672423 672423 0 0.0
(read/write) 177104 177104 0 0.0
.bss 78540 78540 0 0.0
.data 3292 3292 0 0.0
.rodata 86287 86287 0 0.0
.text 585656 585656 0 0.0
shell LP_CC2652R7 (read only) 668206 668206 0 0.0
(read/write) 185656 185656 0 0.0
.bss 83556 83556 0 0.0
.data 3376 3376 0 0.0
.rodata 86502 86502 0 0.0
.text 581388 581388 0 0.0
cyw30739 light cyw930739m2evb_01 (read/write) 587914 587914 0 0.0
.app_xip_area 464524 464524 0 0.0
.bss 65808 65808 0 0.0
.data 760 760 0 0.0
.rodata 0 0 0 0.0
.text 112 112 0 0.0
lock cyw930739m2evb_01 (read/write) 592170 592170 0 0.0
.app_xip_area 463460 463460 0 0.0
.bss 71120 71120 0 0.0
.data 768 768 0 0.0
.rodata 0 0 0 0.0
.text 112 112 0 0.0
ota-requestor-no-progress-logging cyw930739m2evb_01 (read/write) 543966 543966 0 0.0
.app_xip_area 425632 425632 0 0.0
.bss 60800 60800 0 0.0
.data 716 716 0 0.0
.rodata 0 0 0 0.0
.text 112 112 0 0.0
efr32 lighting-app BRD4161A+rpc (read/write) 973892 973892 0 0.0
.bss 152252 152252 0 0.0
.data 2248 2248 0 0.0
.text 819372 819372 0 0.0
BRD4161A+rs911x (read/write) 1031120 1031120 0 0.0
.bss 186656 186656 0 0.0
.data 2092 2092 0 0.0
.text 842352 842352 0 0.0
BRD4187C (read/write) 1145876 1145876 0 0.0
.bss 138640 138640 0 0.0
.data 2596 2596 0 0.0
.text 980044 980044 0 0.0
lock-app BRD4161A+wf200 (read/write) 1157168 1157168 0 0.0
.bss 158208 158208 0 0.0
.data 2100 2100 0 0.0
.text 996840 996840 0 0.0
window-app BRD4187C (read/write) 1139312 1139312 0 0.0
.bss 140080 140080 0 0.0
.data 2620 2620 0 0.0
.text 972016 972016 0 0.0
esp32 all-clusters-app c3devkit (read only) 1223344 1223344 0 0.0
(read/write) 1788294 1788294 0 0.0
.dram0.bss 76944 76944 0 0.0
.dram0.data 13840 13840 0 0.0
.flash.rodata 257864 257864 0 0.0
.flash.text 1223344 1223344 0 0.0
.iram0.text 65204 65204 0 0.0
m5stack (read only) 1233411 1233411 0 0.0
(read/write) 564212 564204 -8 -0.0
.dram0.bss 82312 82312 0 0.0
.dram0.data 34296 34296 0 0.0
.flash.rodata 314936 314928 -8 -0.0
.flash.text 1228027 1228027 0 0.0
.iram0.text 123939 123939 0 0.0
k32w contact k32w0+release (read/write) 666088 666088 0 0.0
.bss 77048 77048 0 0.0
.data 2108 2108 0 0.0
.text 567820 567820 0 0.0
light k32w0+release (read/write) 641812 641812 0 0.0
.bss 74824 74824 0 0.0
.data 2064 2064 0 0.0
.text 562196 562196 0 0.0
lock k32w0+release (read/write) 633092 633092 0 0.0
.bss 75600 75600 0 0.0
.data 2080 2080 0 0.0
.text 552684 552684 0 0.0
linux chip-tool-ipv6only arm64 (read only) 10429892 10429892 0 0.0
(read/write) 706353 706353 0 0.0
.bss 33953 33953 0 0.0
.data 2768 2768 0 0.0
.data.rel.ro 650632 650632 0 0.0
.dynamic 560 560 0 0.0
.got 13896 13896 0 0.0
.init 24 24 0 0.0
.init_array 208 208 0 0.0
.rodata 518164 518164 0 0.0
.text 8256164 8256164 0 0.0
thermostat-no-ble arm64 (read only) 2390428 2390428 0 0.0
(read/write) 143633 143633 0 0.0
.bss 55377 55377 0 0.0
.data 1816 1816 0 0.0
.data.rel.ro 77256 77256 0 0.0
.dynamic 560 560 0 0.0
.got 5176 5176 0 0.0
.init 24 24 0 0.0
.init_array 440 440 0 0.0
.rodata 144436 144436 0 0.0
.text 2003088 2003088 0 0.0
mbed lock-app CY8CPROTO_062_4343W+release (read only) 6224 6224 0 0.0
(read/write) 2452232 2452232 0 0.0
.bss 215028 215028 0 0.0
.data 5872 5872 0 0.0
.text 1414876 1414876 0 0.0
nrfconnect all-clusters-app nrf52840dk_nrf52840 (read/write) 1183451 1183451 0 0.0
bss 144441 144441 0 0.0
rodata 144396 144396 0 0.0
text 815708 815708 0 0.0
all-clusters-minimal-app nrf52840dk_nrf52840 (read/write) 1162119 1162119 0 0.0
bss 143668 143668 0 0.0
rodata 135968 135968 0 0.0
text 803600 803600 0 0.0
psoc6 all-clusters cy8ckit_062s2_43012 (read only) 841968 841968 0 0.0
(read/write) 1745164 1745164 0 0.0
.ARM.attributes 46 46 0 0.0
.ARM.exidx 8 8 0 0.0
.bss 188712 188712 0 0.0
.comment 204 204 0 0.0
.copy.table 24 24 0 0.0
.cy_m0p_image 6216 6216 0 0.0
.cy_sharedmem 8 8 0 0.0
.data 2664 2664 0 0.0
.debug_abbrev 1229390 1229390 0 0.0
.debug_aranges 111856 111856 0 0.0
.debug_frame 373484 373484 0 0.0
.debug_info 26831650 26831649 -1 -0.0
.debug_line 3672038 3672038 0 0.0
.debug_loc 3589149 3589149 0 0.0
.debug_ranges 339712 339712 0 0.0
.debug_str 3441214 3441214 0 0.0
.heap 841968 841968 0 0.0
.noinit 148 148 0 0.0
.ramVectors 736 736 0 0.0
.shstrtab 288 288 0 0.0
.stab 156 156 0 0.0
.stabstr 335 335 0 0.0
.stack_dummy 4096 4096 0 0.0
.strtab 569639 569639 0 0.0
.symtab 421216 421216 0 0.0
.text 1545400 1545400 0 0.0
.zero.table 8 8 0 0.0
text 0 0 0 0.0
all-clusters-minimal cy8ckit_062s2_43012 (read only) 842704 842704 0 0.0
(read/write) 1687764 1687764 0 0.0
.ARM.attributes 46 46 0 0.0
.ARM.exidx 8 8 0 0.0
.bss 187976 187976 0 0.0
.comment 204 204 0 0.0
.copy.table 24 24 0 0.0
.cy_m0p_image 6216 6216 0 0.0
.cy_sharedmem 8 8 0 0.0
.data 2664 2664 0 0.0
.debug_abbrev 1221189 1221189 0 0.0
.debug_aranges 111328 111328 0 0.0
.debug_frame 376564 376564 0 0.0
.debug_info 26568431 26568430 -1 -0.0
.debug_line 3692755 3692755 0 0.0
.debug_loc 3576786 3576786 0 0.0
.debug_ranges 338328 338328 0 0.0
.debug_str 3430227 3430227 0 0.0
.heap 842704 842704 0 0.0
.noinit 148 148 0 0.0
.ramVectors 736 736 0 0.0
.shstrtab 288 288 0 0.0
.stab 156 156 0 0.0
.stabstr 335 335 0 0.0
.stack_dummy 4096 4096 0 0.0
.strtab 533728 533728 0 0.0
.symtab 407648 407648 0 0.0
.text 1488736 1488736 0 0.0
.zero.table 0 0 0 0.0
8 8 0 0.0
light cy8ckit_062s2_43012 (read only) 850896 850896 0 0.0
(read/write) 1606292 1606292 0 0.0
.ARM.attributes 46 46 0 0.0
.ARM.exidx 8 8 0 0.0
.bss 179992 179992 0 0.0
.comment 204 204 0 0.0
.copy.table 24 24 0 0.0
.cy_m0p_image 6216 6216 0 0.0
.cy_sharedmem 8 8 0 0.0
.data 2456 2456 0 0.0
.debug_abbrev 1055300 1055300 0 0.0
.debug_aranges 103536 103536 0 0.0
.debug_frame 346896 346896 0 0.0
.debug_info 22032155 22032154 -1 -0.0
.debug_line 3262693 3262693 0 0.0
.debug_loc 3274748 3274748 0 0.0
.debug_ranges 303632 303632 0 0.0
.debug_str 3235759 3235759 0 0.0
.heap 850896 850896 0 0.0
.noinit 148 148 0 0.0
.ramVectors 736 736 0 0.0
.shstrtab 288 288 0 0.0
.stab 156 156 0 0.0
.stabstr 335 335 0 0.0
.stack_dummy 4096 4096 0 0.0
.strtab 470105 470105 0 0.0
.symtab 376096 376096 0 0.0
.text 1415456 1415456 0 0.0
.zero.table 0 0 0 0.0
8 8 0 0.0
lock cy8ckit_062s2_43012 (read only) 845880 845880 0 0.0
(read/write) 1640212 1640212 0 0.0
.ARM.attributes 46 46 0 0.0
.ARM.exidx 8 8 0 0.0
.bss 184992 184992 0 0.0
.comment 204 204 0 0.0
.copy.table 24 24 0 0.0
.cy_m0p_image 6216 6216 0 0.0
.cy_sharedmem 8 8 0 0.0
.data 2472 2472 0 0.0
.debug_abbrev 1057426 1057426 0 0.0
.debug_aranges 103936 103936 0 0.0
.debug_frame 348788 348788 0 0.0
.debug_info 22270851 22270851 0 0.0
.debug_line 3260558 3260558 0 0.0
.debug_loc 3303341 3303341 0 0.0
.debug_ranges 305576 305576 0 0.0
.debug_str 3255273 3255273 0 0.0
.heap 845880 845880 0 0.0
.noinit 148 148 0 0.0
.ramVectors 736 736 0 0.0
.shstrtab 288 288 0 0.0
.stab 156 156 0 0.0
.stabstr 335 335 0 0.0
.stack_dummy 4096 4096 0 0.0
.strtab 472512 472512 0 0.0
.symtab 377760 377760 0 0.0
.text 1444360 1444360 0 0.0
.zero.table 0 0 0 0.0
8 8 0 0.0
qpg lighting-app qpg6105+debug (read/write) 1148656 1148656 0 0.0
.bss 110556 110556 0 0.0
.data 832 832 0 0.0
.text 595756 595756 0 0.0
lock-app qpg6105+debug (read/write) 1113720 1113720 0 0.0
.bss 106372 106372 0 0.0
.data 836 836 0 0.0
.text 560816 560816 0 0.0
telink light-switch-app tlsr9518adk80d (read/write) 789372 789372 0 0.0
bss 72480 72480 0 0.0
noinit 43520 43520 0 0.0
text 553144 553146 2 0.0
lighting-app tlsr9518adk80d (read/write) 811484 811484 0 0.0
bss 73328 73328 0 0.0
noinit 43520 43520 0 0.0
text 571366 571368 2 0.0
ota-requestor-app tlsr9518adk80d (read/write) 819420 819420 0 0.0
bss 74236 74236 0 0.0
noinit 43520 43520 0 0.0
text 577548 577548 0 0.0

@bzbarsky-apple bzbarsky-apple merged commit 7b284c0 into project-chip:master Oct 11, 2022
@bzbarsky-apple bzbarsky-apple deleted the bootstrap-submodule-sync branch October 11, 2022 02:04
selissia pushed a commit to selissia/connectedhomeip that referenced this pull request Oct 12, 2022
@bzbarsky-apple @selissia
Bootstrap should sync submodules. (project-chip#23095)
4641f3a 
When submodule URLs change, re-bootstrap will fail unless something does "git
submodule sync".  We should just do that as part of bootstrap, instead of
assuming that developers know to do it.

Fixes project-chip#23059
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Reviewers

@mrjerryjohns mrjerryjohns mrjerryjohns approved these changes

@msandstedt msandstedt msandstedt approved these changes

@andy31415 andy31415 Awaiting requested review from andy31415

@anush-apple anush-apple Awaiting requested review from anush-apple

@arkq arkq Awaiting requested review from arkq

@Byungjoo-Lee Byungjoo-Lee Awaiting requested review from Byungjoo-Lee

@carol-apple carol-apple Awaiting requested review from carol-apple

@chrisdecenzo chrisdecenzo Awaiting requested review from chrisdecenzo

@chshu chshu Awaiting requested review from chshu

@chulspro chulspro Awaiting requested review from chulspro

@Damian-Nordic Damian-Nordic Awaiting requested review from Damian-Nordic

@dhrishi dhrishi Awaiting requested review from dhrishi

@electrocucaracha electrocucaracha Awaiting requested review from electrocucaracha

@erjiaqing erjiaqing Awaiting requested review from erjiaqing

@franck-apple franck-apple Awaiting requested review from franck-apple

@gjc13 gjc13 Awaiting requested review from gjc13

@harsha-rajendran harsha-rajendran Awaiting requested review from harsha-rajendran

@hawk248 hawk248 Awaiting requested review from hawk248

@isiu-apple isiu-apple Awaiting requested review from isiu-apple

@jelderton jelderton Awaiting requested review from jelderton

@jepenven-silabs jepenven-silabs Awaiting requested review from jepenven-silabs

@jmartinez-silabs jmartinez-silabs Awaiting requested review from jmartinez-silabs

@jtung-apple jtung-apple Awaiting requested review from jtung-apple

@kpschoedel kpschoedel Awaiting requested review from kpschoedel

@lazarkov lazarkov Awaiting requested review from lazarkov

@LuDuda LuDuda Awaiting requested review from LuDuda

@mlepage-google mlepage-google Awaiting requested review from mlepage-google

@saurabhst saurabhst Awaiting requested review from saurabhst

@selissia selissia Awaiting requested review from selissia

@tcarmelveilleux tcarmelveilleux Awaiting requested review from tcarmelveilleux

@tecimovic tecimovic Awaiting requested review from tecimovic

@tehampson tehampson Awaiting requested review from tehampson

@turon turon Awaiting requested review from turon

@vijs vijs Awaiting requested review from vijs

@vivien-apple vivien-apple Awaiting requested review from vivien-apple

@wbschiller wbschiller Awaiting requested review from wbschiller

@woody-apple woody-apple Awaiting requested review from woody-apple

@xylophone21 xylophone21 Awaiting requested review from xylophone21

@yufengwangca yufengwangca Awaiting requested review from yufengwangca

@yunhanw-google yunhanw-google Awaiting requested review from yunhanw-google

Assignees
No one assigned
Labels
review - approved scripts
Projects
None yet
Milestone
No milestone
Development

Successfully merging this pull request may close these issues.

[Core] scripts/bootstrap.sh should do a git submodule sync
3 participants
@bzbarsky-apple @msandstedt @mrjerryjohns