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Remove unnecessary cva6 dependency of ariane_soc_pkg
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*_slv_t types are needed only in ariane_testharness.
The CVA6 core should not depend on packages related to the SoC
where it is placed.

Signed-off-by: Luca Zulberti <zulberti.luca@gmail.com>
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@LucaZulberti
LucaZulberti committed Jan 29, 2021
1 parent 5086570 commit bff4c9d
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Showing 7 changed files with 217 additions and 101 deletions.
3 changes: 2 additions & 1 deletion Bender.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,6 @@ sources:
- src/register_interface/src/reg_intf.sv
- src/register_interface/src/reg_intf_pkg.sv
- include/axi_intf.sv
- tb/ariane_soc_pkg.sv
- include/ariane_axi_pkg.sv
- src/fpu/src/fpnew_pkg.sv
- src/fpu/src/fpu_div_sqrt_mvp/hdl/defs_div_sqrt_mvp.sv
Expand Down Expand Up @@ -196,6 +195,8 @@ sources:
- src/tech_cells_generic/src/pulp_clock_mux2.sv
- target: test
files:
- tb/ariane_soc_pkg.sv
- tb/ariane_axi_soc_pkg.sv
- tb/ariane_testharness.sv
- tb/ariane_peripherals.sv
- tb/common/uart.sv
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3 changes: 2 additions & 1 deletion Flist.ariane
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Expand Up @@ -58,9 +58,10 @@ src/fpu/src/fpnew_rounding.sv
src/fpu/src/fpnew_top.sv
src/axi/src/axi_pkg.sv
tb/ariane_soc_pkg.sv
tb/ariane_axi_soc_pkg.sv
include/ariane_axi_pkg.sv
include/wt_cache_pkg.sv
//include/std_cache_pkg.sv
include/std_cache_pkg.sv
include/axi_intf.sv
include/instr_tracer_pkg.sv
src/util/instr_tracer_if.sv
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1 change: 1 addition & 0 deletions Makefile
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Expand Up @@ -83,6 +83,7 @@ ariane_pkg := include/riscv_pkg.sv \
src/register_interface/src/reg_intf_pkg.sv \
include/axi_intf.sv \
tb/ariane_soc_pkg.sv \
tb/ariane_axi_soc_pkg.sv \
include/ariane_axi_pkg.sv \
src/fpu/src/fpnew_pkg.sv \
src/fpu/src/fpu_div_sqrt_mvp/hdl/defs_div_sqrt_mvp.sv
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72 changes: 2 additions & 70 deletions include/ariane_axi_pkg.sv
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Expand Up @@ -20,13 +20,13 @@ package ariane_axi;
// used in axi_adapter.sv
typedef enum logic { SINGLE_REQ, CACHE_LINE_REQ } ad_req_t;

localparam IdWidth = 4; // Recommended by AXI standard
localparam UserWidth = 1;
localparam AddrWidth = 64;
localparam DataWidth = 64;
localparam StrbWidth = DataWidth / 8;

typedef logic [ariane_soc::IdWidth-1:0] id_t;
typedef logic [ariane_soc::IdWidthSlave-1:0] id_slv_t;
typedef logic [IdWidth-1:0] id_t;
typedef logic [AddrWidth-1:0] addr_t;
typedef logic [DataWidth-1:0] data_t;
typedef logic [StrbWidth-1:0] strb_t;
Expand All @@ -48,22 +48,6 @@ package ariane_axi;
user_t user;
} aw_chan_t;

// AW Channel - Slave
typedef struct packed {
id_slv_t id;
addr_t addr;
axi_pkg::len_t len;
axi_pkg::size_t size;
axi_pkg::burst_t burst;
logic lock;
axi_pkg::cache_t cache;
axi_pkg::prot_t prot;
axi_pkg::qos_t qos;
axi_pkg::region_t region;
axi_pkg::atop_t atop;
user_t user;
} aw_chan_slv_t;

// W Channel - AXI4 doesn't define a wid
typedef struct packed {
data_t data;
Expand All @@ -79,13 +63,6 @@ package ariane_axi;
user_t user;
} b_chan_t;

// B Channel - Slave
typedef struct packed {
id_slv_t id;
axi_pkg::resp_t resp;
user_t user;
} b_chan_slv_t;

// AR Channel
typedef struct packed {
id_t id;
Expand All @@ -101,21 +78,6 @@ package ariane_axi;
user_t user;
} ar_chan_t;

// AR Channel - Slave
typedef struct packed {
id_slv_t id;
addr_t addr;
axi_pkg::len_t len;
axi_pkg::size_t size;
axi_pkg::burst_t burst;
logic lock;
axi_pkg::cache_t cache;
axi_pkg::prot_t prot;
axi_pkg::qos_t qos;
axi_pkg::region_t region;
user_t user;
} ar_chan_slv_t;

// R Channel
typedef struct packed {
id_t id;
Expand All @@ -125,15 +87,6 @@ package ariane_axi;
user_t user;
} r_chan_t;

// R Channel - Slave
typedef struct packed {
id_slv_t id;
data_t data;
axi_pkg::resp_t resp;
logic last;
user_t user;
} r_chan_slv_t;

// Request/Response structs
typedef struct packed {
aw_chan_t aw;
Expand All @@ -156,25 +109,4 @@ package ariane_axi;
r_chan_t r;
} resp_t;

typedef struct packed {
aw_chan_slv_t aw;
logic aw_valid;
w_chan_t w;
logic w_valid;
logic b_ready;
ar_chan_slv_t ar;
logic ar_valid;
logic r_ready;
} req_slv_t;

typedef struct packed {
logic aw_ready;
logic ar_ready;
logic w_ready;
logic b_valid;
b_chan_slv_t b;
logic r_valid;
r_chan_slv_t r;
} resp_slv_t;

endpackage
180 changes: 180 additions & 0 deletions tb/ariane_axi_soc_pkg.sv
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Original file line number Diff line number Diff line change
@@ -0,0 +1,180 @@
/* Copyright 2018 ETH Zurich and University of Bologna.
* Copyright and related rights are licensed under the Solderpad Hardware
* License, Version 0.51 (the “License”); you may not use this file except in
* compliance with the License. You may obtain a copy of the License at
* http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law
* or agreed to in writing, software, hardware and materials distributed under
* this License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR
* CONDITIONS OF ANY KIND, either express or implied. See the License for the
* specific language governing permissions and limitations under the License.
*
* File: ariane_axi_soc_pkg.sv
* Author: Florian Zaruba <zarubaf@iis.ee.ethz.ch>
* Date: 17.8.2018
*
* Description: Contains Ariane's AXI ports on SoC, does not contain user ports
*/

package ariane_axi_soc;

// used in axi_adapter.sv
typedef enum logic { SINGLE_REQ, CACHE_LINE_REQ } ad_req_t;

localparam UserWidth = 1;
localparam AddrWidth = 64;
localparam DataWidth = 64;
localparam StrbWidth = DataWidth / 8;

typedef logic [ariane_soc::IdWidth-1:0] id_t;
typedef logic [ariane_soc::IdWidthSlave-1:0] id_slv_t;
typedef logic [AddrWidth-1:0] addr_t;
typedef logic [DataWidth-1:0] data_t;
typedef logic [StrbWidth-1:0] strb_t;
typedef logic [UserWidth-1:0] user_t;

// AW Channel
typedef struct packed {
id_t id;
addr_t addr;
axi_pkg::len_t len;
axi_pkg::size_t size;
axi_pkg::burst_t burst;
logic lock;
axi_pkg::cache_t cache;
axi_pkg::prot_t prot;
axi_pkg::qos_t qos;
axi_pkg::region_t region;
axi_pkg::atop_t atop;
user_t user;
} aw_chan_t;

// AW Channel - Slave
typedef struct packed {
id_slv_t id;
addr_t addr;
axi_pkg::len_t len;
axi_pkg::size_t size;
axi_pkg::burst_t burst;
logic lock;
axi_pkg::cache_t cache;
axi_pkg::prot_t prot;
axi_pkg::qos_t qos;
axi_pkg::region_t region;
axi_pkg::atop_t atop;
user_t user;
} aw_chan_slv_t;

// W Channel - AXI4 doesn't define a wid
typedef struct packed {
data_t data;
strb_t strb;
logic last;
user_t user;
} w_chan_t;

// B Channel
typedef struct packed {
id_t id;
axi_pkg::resp_t resp;
user_t user;
} b_chan_t;

// B Channel - Slave
typedef struct packed {
id_slv_t id;
axi_pkg::resp_t resp;
user_t user;
} b_chan_slv_t;

// AR Channel
typedef struct packed {
id_t id;
addr_t addr;
axi_pkg::len_t len;
axi_pkg::size_t size;
axi_pkg::burst_t burst;
logic lock;
axi_pkg::cache_t cache;
axi_pkg::prot_t prot;
axi_pkg::qos_t qos;
axi_pkg::region_t region;
user_t user;
} ar_chan_t;

// AR Channel - Slave
typedef struct packed {
id_slv_t id;
addr_t addr;
axi_pkg::len_t len;
axi_pkg::size_t size;
axi_pkg::burst_t burst;
logic lock;
axi_pkg::cache_t cache;
axi_pkg::prot_t prot;
axi_pkg::qos_t qos;
axi_pkg::region_t region;
user_t user;
} ar_chan_slv_t;

// R Channel
typedef struct packed {
id_t id;
data_t data;
axi_pkg::resp_t resp;
logic last;
user_t user;
} r_chan_t;

// R Channel - Slave
typedef struct packed {
id_slv_t id;
data_t data;
axi_pkg::resp_t resp;
logic last;
user_t user;
} r_chan_slv_t;

// Request/Response structs
typedef struct packed {
aw_chan_t aw;
logic aw_valid;
w_chan_t w;
logic w_valid;
logic b_ready;
ar_chan_t ar;
logic ar_valid;
logic r_ready;
} req_t;

typedef struct packed {
logic aw_ready;
logic ar_ready;
logic w_ready;
logic b_valid;
b_chan_t b;
logic r_valid;
r_chan_t r;
} resp_t;

typedef struct packed {
aw_chan_slv_t aw;
logic aw_valid;
w_chan_t w;
logic w_valid;
logic b_ready;
ar_chan_slv_t ar;
logic ar_valid;
logic r_ready;
} req_slv_t;

typedef struct packed {
logic aw_ready;
logic ar_ready;
logic w_ready;
logic b_valid;
b_chan_slv_t b;
logic r_valid;
r_chan_slv_t r;
} resp_slv_t;

endpackage
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