stlink-common: Fix alignment issue with stm32l and stm32l0 loaders

Commit e43a737 removes one instruction in stm32l and stm32l0 loaders,
which results in 32 bits alignment breakage so that loarder load fails:
~/stlink/st-flash write main.bin 0x8000000
2016-04-06T00:13:28 INFO /home/jg/stlink/src/stlink-common.c: Loading device parameters....
2016-04-06T00:13:28 INFO /home/jg/stlink/src/stlink-common.c: Device connected is: L1 Medium-Plus-density device, id 0x10086427
2016-04-06T00:13:28 INFO /home/jg/stlink/src/stlink-common.c: SRAM size: 0x8000 bytes (32 KiB), Flash: 0x40000 bytes (256 KiB) in pages of 256 bytes
2016-04-06T00:13:28 INFO /home/jg/stlink/src/stlink-common.c: Attempting to write 16816 (0x41b0) bytes to stm32 address: 134217728 (0x8000000)
Flash page at addr: 0x08004100 erased
2016-04-06T00:13:29 INFO /home/jg/stlink/src/stlink-common.c: Finished erasing 66 pages of 256 (0x100) bytes
2016-04-06T00:13:29 INFO /home/jg/stlink/src/stlink-common.c: Starting Half page flash write for STM32L core id
Error: Data length doesn't have a 32 bit alignment: +2 byte.
Aborted

This patch adds some padding at the end of these loaders to fix the alignment.

Reported-by: /~https://github.com/Jegeva
Fixes: stlink-org#390

Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>

src/stlink-common.c

@@ -1525,7 +1525,8 @@ int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) {
 
         0x00, 0x2a,
         0xf8, 0xd3,
-        0x00, 0xbe
+        0x00, 0xbe,
+        0x00, 0x00, // Add padding to align on 32 bits
     };
 
     static const uint8_t loader_code_stm32l0[] = {
@@ -1547,7 +1548,8 @@ int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) {
 
         0x00, 0x2a,
         0xf8, 0xd3,
-        0x00, 0xbe
+        0x00, 0xbe,
+        0x00, 0x00, // Add padding to align on 32 bits
     };
 
     static const uint8_t loader_code_stm32f4[] = {