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Rollup merge of rust-lang#111369 - Nassiel:master, r=oli-obk
Added custom risc32-imac for esp-espidf target ESP32-C6 and the upcoming ESP32-P4 are the first Espressif chips that support the "A" (atomic) extension of the RISCV specification. As such, they do not work with the existing `riscv32imc-esp-espidf` target and instead need a new one (in this PR) called `riscv32imac-esp-espidf`.
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use crate::spec::{cvs, PanicStrategy, RelocModel, Target, TargetOptions}; | ||
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pub fn target() -> Target { | ||
Target { | ||
data_layout: "e-m:e-p:32:32-i64:64-n32-S128".into(), | ||
llvm_target: "riscv32".into(), | ||
pointer_width: 32, | ||
arch: "riscv32".into(), | ||
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options: TargetOptions { | ||
families: cvs!["unix"], | ||
os: "espidf".into(), | ||
env: "newlib".into(), | ||
vendor: "espressif".into(), | ||
linker: Some("riscv32-esp-elf-gcc".into()), | ||
cpu: "generic-rv32".into(), | ||
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// As RiscV32IMAC architecture does natively support atomics, | ||
// automatically enable the support for the Rust STD library. | ||
max_atomic_width: Some(64), | ||
atomic_cas: true, | ||
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features: "+m,+a,+c".into(), | ||
panic_strategy: PanicStrategy::Abort, | ||
relocation_model: RelocModel::Static, | ||
emit_debug_gdb_scripts: false, | ||
eh_frame_header: false, | ||
..Default::default() | ||
}, | ||
} | ||
} |
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