[AMDGPU] Fix unreachable reg bit width#122107

Merged

arsenm merged 11 commits intollvm:mainfrom Shoreshen:Add-register-class-bit-width-for-SReg_256_XNULL-and-SReg_128_XNULL

Jan 22, 2025

+17

Commits on Jan 8, 2025

fix unreachable reg bit width. need add test case latter
Shoreshen
committed

Commits on Jan 13, 2025

Merge branch 'llvm:main' into Add-register-class-bit-width-for-SReg_256_XNULL-and-SReg_128_XNULL
Shoreshen
authored

Commits on Jan 20, 2025

Merge branch 'llvm:main' into Add-register-class-bit-width-for-SReg_256_XNULL-and-SReg_128_XNULL
Shoreshen
authored

Commits on Jan 21, 2025

Merge branch 'llvm:main' into Add-register-class-bit-width-for-SReg_256_XNULL-and-SReg_128_XNULL
Shoreshen
authored

Commits on Jan 22, 2025