serdes/gty_ultrascale: Add sdmx_data signals to allow SDM control fro…

…m user logic.
enjoy-digital · Jan 7, 2025 · 5806208 · 5806208
1 parent 754161d
commit 5806208
Showing 1 changed file with 6 additions and 2 deletions.
diff --git a/liteiclink/serdes/gty_ultrascale.py b/liteiclink/serdes/gty_ultrascale.py
@@ -101,6 +101,10 @@ def __init__(self, refclk, refclk_freq, linerate, refclk_from_fabric=False):
         # DRP.
         self.drp = DRPInterface()
 
+        # SDM.
+        self.sdm0_data = Signal(24, reset=round(config["f"]*(2**24)))
+        self.sdm1_data = Signal(24, reset=round(config["f"]*(2**24)))
+
         # # #
 
         use_qpll0 = config["qpll"] == "qpll0"
@@ -209,7 +213,7 @@ def __init__(self, refclk, refclk_freq, linerate, refclk_from_fabric=False):
             i_DRPWE           = self.drp.we,
 
             # QPLL0.
-            i_SDM0DATA        = round(config["f"]*(2**24)),
+            i_SDM0DATA        = self.sdm0_data,
             i_SDM0WIDTH       = 24,
             i_SDM0RESET       = 0b0,
             i_SDM0TOGGLE      = 0b0,
@@ -225,7 +229,7 @@ def __init__(self, refclk, refclk_freq, linerate, refclk_from_fabric=False):
             i_QPLL0RESET      = self.reset,
 
             # QPLL1.
-            i_SDM1DATA        = round(config["f"]*(2**24)),
+            i_SDM1DATA        = self.sdm1_data,
             i_SDM1WIDTH       = 24,
             i_SDM1RESET       = 0b0,
             i_SDM1TOGGLE      = 0b0,