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CSR: fix the wmask of mstatus #194

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merged 1 commit into from
May 13, 2024
Merged

CSR: fix the wmask of mstatus #194

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2 changes: 1 addition & 1 deletion difftest
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Submodule difftest updated 18 files
+1 −1 .github/workflows/format.yml
+1 −1 .github/workflows/main.yml
+12 −3 Makefile
+65 −11 README.md
+0 −3 config/config.h
+19 −0 libso.mk
+6 −0 src/main/scala/Difftest.scala
+36 −4 src/test/csrc/common/compress.cpp
+1 −1 src/test/csrc/common/compress.h
+14 −19 src/test/csrc/difftest/difftest.cpp
+8 −8 src/test/csrc/difftest/difftest.h
+37 −32 src/test/csrc/plugin/spikedasm/spikedasm.cpp
+4 −3 src/test/csrc/plugin/spikedasm/spikedasm.h
+25 −5 src/test/csrc/vcs/vcs_main.cpp
+9 −2 src/test/csrc/verilator/emu.cpp
+1 −0 src/test/scala/DifftestMain.scala
+8 −1 src/test/vsrc/vcs/top.v
+7 −7 verilator.mk
Binary file modified ready-to-run/riscv64-nemu-interpreter-so
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19 changes: 17 additions & 2 deletions src/main/scala/nutcore/backend/fu/CSR.scala
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Original file line number Diff line number Diff line change
Expand Up @@ -296,6 +296,22 @@ class CSR(implicit val p: NutCoreConfig) extends NutCoreModule with HasCSRConst{
// | spp | 0 |
// | pie | 0000 |
// | ie | 0000 | uie hardlinked to 0, as N ext is not implemented
private def GenMask(i: Int): UInt = GenMask(i, i)
private def GenMask(i: Int, j: Int): UInt = ZeroExt(Fill(i - j + 1, true.B) << j, 64)
val mstatusWMask = (~ZeroExt((
GenMask(63) | // SD is read-only
GenMask(62, 38) | // WPRI
GenMask(37) | // MBE is read-only
GenMask(36) | // SBE is read-only
GenMask(35, 32) | // SXL and UXL cannot be changed
GenMask(31, 23) | // WPRI
GenMask(16, 15) | // XS is read-only
GenMask(14, 13) | // FS is read-only
GenMask(6) | // UBE, always little-endian (0)
GenMask(4) | // WPRI
GenMask(2) | // WPRI
GenMask(0) // WPRI
), 64)).asUInt
val mstatusStruct = mstatus.asTypeOf(new MstatusStruct)
def mstatusUpdateSideEffect(mstatus: UInt): UInt = {
val mstatusOld = WireInit(mstatus.asTypeOf(new MstatusStruct))
Expand Down Expand Up @@ -426,8 +442,7 @@ class CSR(implicit val p: NutCoreConfig) extends NutCoreModule with HasCSRConst{
MaskedRegMap(Mhartid, mhartid, 0.U, MaskedRegMap.Unwritable),

// Machine Trap Setup
// MaskedRegMap(Mstatus, mstatus, "hffffffffffffffee".U, (x=>{printf("mstatus write: %x time: %d\n", x, GTimer()); x})),
MaskedRegMap(Mstatus, mstatus, "hffffffffffffffff".U(64.W), mstatusUpdateSideEffect),
MaskedRegMap(Mstatus, mstatus, mstatusWMask, mstatusUpdateSideEffect),
MaskedRegMap(Misa, misa), // now MXL, EXT is not changeable
MaskedRegMap(Medeleg, medeleg, "hbbff".U(64.W)),
MaskedRegMap(Mideleg, mideleg, "h222".U(64.W)),
Expand Down