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7 seg display counter working on FPGA board Xilinx-Sparan3 - teaching support slides and documentation are included

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7 seg display counter implemented on FPGA
working on FPGA board Xilinx-Sparan3

please refer to ppt slide of the full course and full documentation in the doc directory
( example used to teach in FST-Tunisia and ENSI-Tunisia (by N.Chouba)

Count display spec
Main idea
Seven segment bridge block
Counter block
Display Unit – Ten block
De-bounce block
Top level block
Testbench & simulation
Synthesis result

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7 seg display counter working on FPGA board Xilinx-Sparan3 - teaching support slides and documentation are included

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