Accessing dram and nand from PL side

[M3m3M4n]

As title. I've never touched a SOC unit before and wonder if that can be done, assuming the SOC already using them for memory and storage.

[nic3-14159]

I believe you would need to use the AXI ports connecting the PS and the PL in order to access the DRAM and NAND flash from the PL side. I've personally haven't played around with that yet, so hopefully someone else with more experience help you with how to use it.

[delhatch]

Yes. The PL normally interacts with the ARM core via the AXI_GP0 port. For the PL to access DRAM directly, the PL must use the AXI_HP0 interface.

[delhatch]

Having the PL access DRAM is not trivial, but with a bit of learning and proper design, it can be done. I built a VGA controller that uses the DRAM for image storage. The ARM processor stores values to DRAM to create the image, and then the VGA controller (in PL) accesses that DRAM to create the image.
The project is in github at /~https://github.com/delhatch/VGA_mem_mapped