diff --git a/crates/core_arch/src/x86_64/amx.rs b/crates/core_arch/src/x86_64/amx.rs
index 8e324958b4..2eea9e0e8a 100644
--- a/crates/core_arch/src/x86_64/amx.rs
+++ b/crates/core_arch/src/x86_64/amx.rs
@@ -28,13 +28,12 @@ pub unsafe fn _tile_storeconfig(mem_addr: *mut i8) {
 ///
 /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_loadd&ig_expand=6877)
 #[inline]
-#[allow(non_upper_case_globals)]
 #[rustc_legacy_const_generics(0)]
 #[target_feature(enable = "amx-tile")]
 #[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
-pub unsafe fn _tile_loadd<const dst: i8>(base: *const i8, stride: usize) {
-    static_assert_uimm_bits!(dst, 3);
-    tileloadd64(dst, base, stride);
+pub unsafe fn _tile_loadd<const DST: i8>(base: *const i8, stride: usize) {
+    static_assert_uimm_bits!(DST, 3);
+    tileloadd64(DST, base, stride);
 }
 
 /// Release the tile configuration to return to the init state, which releases all storage it currently holds.
@@ -51,13 +50,12 @@ pub unsafe fn _tile_release() {
 ///
 /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_stored&ig_expand=6881)
 #[inline]
-#[allow(non_upper_case_globals)]
 #[rustc_legacy_const_generics(0)]
 #[target_feature(enable = "amx-tile")]
 #[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
-pub unsafe fn _tile_stored<const dst: i8>(base: *mut i8, stride: usize) {
-    static_assert_uimm_bits!(dst, 3);
-    tilestored64(dst, base, stride);
+pub unsafe fn _tile_stored<const DST: i8>(base: *mut i8, stride: usize) {
+    static_assert_uimm_bits!(DST, 3);
+    tilestored64(DST, base, stride);
 }
 
 /// Load tile rows from memory specifieid by base address and stride into destination tile dst using the tile configuration
@@ -66,26 +64,24 @@ pub unsafe fn _tile_stored<const dst: i8>(base: *mut i8, stride: usize) {
 ///
 /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_stream_loadd&ig_expand=6883)
 #[inline]
-#[allow(non_upper_case_globals)]
 #[rustc_legacy_const_generics(0)]
 #[target_feature(enable = "amx-tile")]
 #[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
-pub unsafe fn _tile_stream_loadd<const dst: i8>(base: *const i8, stride: usize) {
-    static_assert_uimm_bits!(dst, 3);
-    tileloaddt164(dst, base, stride);
+pub unsafe fn _tile_stream_loadd<const DST: i8>(base: *const i8, stride: usize) {
+    static_assert_uimm_bits!(DST, 3);
+    tileloaddt164(DST, base, stride);
 }
 
 /// Zero the tile specified by tdest.
 ///
 /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_zero&ig_expand=6885)
 #[inline]
-#[allow(non_upper_case_globals)]
 #[rustc_legacy_const_generics(0)]
 #[target_feature(enable = "amx-tile")]
 #[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
-pub unsafe fn _tile_zero<const dst: i8>() {
-    static_assert_uimm_bits!(dst, 3);
-    tilezero(dst);
+pub unsafe fn _tile_zero<const DST: i8>() {
+    static_assert_uimm_bits!(DST, 3);
+    tilezero(DST);
 }
 
 /// Compute dot-product of BF16 (16-bit) floating-point pairs in tiles a and b,
@@ -94,15 +90,14 @@ pub unsafe fn _tile_zero<const dst: i8>() {
 ///
 /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_dpbf16ps&ig_expand=6864)
 #[inline]
-#[allow(non_upper_case_globals)]
 #[rustc_legacy_const_generics(0, 1, 2)]
 #[target_feature(enable = "amx-bf16")]
 #[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
-pub unsafe fn _tile_dpbf16ps<const dst: i8, const A: i8, const B: i8>() {
-    static_assert_uimm_bits!(dst, 3);
+pub unsafe fn _tile_dpbf16ps<const DST: i8, const A: i8, const B: i8>() {
+    static_assert_uimm_bits!(DST, 3);
     static_assert_uimm_bits!(A, 3);
     static_assert_uimm_bits!(B, 3);
-    tdpbf16ps(dst, A, B);
+    tdpbf16ps(DST, A, B);
 }
 
 /// Compute dot-product of bytes in tiles with a source/destination accumulator.
@@ -112,15 +107,14 @@ pub unsafe fn _tile_dpbf16ps<const dst: i8, const A: i8, const B: i8>() {
 ///
 /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_dpbssd&ig_expand=6866)
 #[inline]
-#[allow(non_upper_case_globals)]
 #[rustc_legacy_const_generics(0, 1, 2)]
 #[target_feature(enable = "amx-int8")]
 #[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
-pub unsafe fn _tile_dpbssd<const dst: i8, const A: i8, const B: i8>() {
-    static_assert_uimm_bits!(dst, 3);
+pub unsafe fn _tile_dpbssd<const DST: i8, const A: i8, const B: i8>() {
+    static_assert_uimm_bits!(DST, 3);
     static_assert_uimm_bits!(A, 3);
     static_assert_uimm_bits!(B, 3);
-    tdpbssd(dst, A, B);
+    tdpbssd(DST, A, B);
 }
 
 /// Compute dot-product of bytes in tiles with a source/destination accumulator.
@@ -130,15 +124,14 @@ pub unsafe fn _tile_dpbssd<const dst: i8, const A: i8, const B: i8>() {
 ///
 /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_dpbsud&ig_expand=6868)
 #[inline]
-#[allow(non_upper_case_globals)]
 #[rustc_legacy_const_generics(0, 1, 2)]
 #[target_feature(enable = "amx-int8")]
 #[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
-pub unsafe fn _tile_dpbsud<const dst: i8, const A: i8, const B: i8>() {
-    static_assert_uimm_bits!(dst, 3);
+pub unsafe fn _tile_dpbsud<const DST: i8, const A: i8, const B: i8>() {
+    static_assert_uimm_bits!(DST, 3);
     static_assert_uimm_bits!(A, 3);
     static_assert_uimm_bits!(B, 3);
-    tdpbsud(dst, A, B);
+    tdpbsud(DST, A, B);
 }
 
 /// Compute dot-product of bytes in tiles with a source/destination accumulator.
@@ -148,15 +141,14 @@ pub unsafe fn _tile_dpbsud<const dst: i8, const A: i8, const B: i8>() {
 ///
 /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_dpbusd&ig_expand=6870)
 #[inline]
-#[allow(non_upper_case_globals)]
 #[rustc_legacy_const_generics(0, 1, 2)]
 #[target_feature(enable = "amx-int8")]
 #[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
-pub unsafe fn _tile_dpbusd<const dst: i8, const A: i8, const B: i8>() {
-    static_assert_uimm_bits!(dst, 3);
+pub unsafe fn _tile_dpbusd<const DST: i8, const A: i8, const B: i8>() {
+    static_assert_uimm_bits!(DST, 3);
     static_assert_uimm_bits!(A, 3);
     static_assert_uimm_bits!(B, 3);
-    tdpbusd(dst, A, B);
+    tdpbusd(DST, A, B);
 }
 
 /// Compute dot-product of bytes in tiles with a source/destination accumulator.
@@ -166,15 +158,14 @@ pub unsafe fn _tile_dpbusd<const dst: i8, const A: i8, const B: i8>() {
 ///
 /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_dpbuud&ig_expand=6872)
 #[inline]
-#[allow(non_upper_case_globals)]
 #[rustc_legacy_const_generics(0, 1, 2)]
 #[target_feature(enable = "amx-int8")]
 #[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
-pub unsafe fn _tile_dpbuud<const dst: i8, const A: i8, const B: i8>() {
-    static_assert_uimm_bits!(dst, 3);
+pub unsafe fn _tile_dpbuud<const DST: i8, const A: i8, const B: i8>() {
+    static_assert_uimm_bits!(DST, 3);
     static_assert_uimm_bits!(A, 3);
     static_assert_uimm_bits!(B, 3);
-    tdpbuud(dst, A, B);
+    tdpbuud(DST, A, B);
 }
 
 /// Compute dot-product of FP16 (16-bit) floating-point pairs in tiles a and b,
@@ -183,15 +174,14 @@ pub unsafe fn _tile_dpbuud<const dst: i8, const A: i8, const B: i8>() {
 ///
 /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_dpfp16ps&ig_expand=6874)
 #[inline]
-#[allow(non_upper_case_globals)]
 #[rustc_legacy_const_generics(0, 1, 2)]
 #[target_feature(enable = "amx-fp16")]
 #[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
-pub unsafe fn _tile_dpfp16ps<const dst: i8, const A: i8, const B: i8>() {
-    static_assert_uimm_bits!(dst, 3);
+pub unsafe fn _tile_dpfp16ps<const DST: i8, const A: i8, const B: i8>() {
+    static_assert_uimm_bits!(DST, 3);
     static_assert_uimm_bits!(A, 3);
     static_assert_uimm_bits!(B, 3);
-    tdpfp16ps(dst, A, B);
+    tdpfp16ps(DST, A, B);
 }
 
 /// Perform matrix multiplication of two tiles containing complex elements and accumulate the results into a packed single precision tile.
@@ -204,15 +194,14 @@ pub unsafe fn _tile_dpfp16ps<const dst: i8, const A: i8, const B: i8>() {
 ///
 /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_cmmimfp16ps&ig_expand=6860)
 #[inline]
-#[allow(non_upper_case_globals)]
 #[rustc_legacy_const_generics(0, 1, 2)]
 #[target_feature(enable = "amx-complex")]
 #[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
-pub unsafe fn _tile_cmmimfp16ps<const dst: i8, const A: i8, const B: i8>() {
-    static_assert_uimm_bits!(dst, 3);
+pub unsafe fn _tile_cmmimfp16ps<const DST: i8, const A: i8, const B: i8>() {
+    static_assert_uimm_bits!(DST, 3);
     static_assert_uimm_bits!(A, 3);
     static_assert_uimm_bits!(B, 3);
-    tcmmimfp16ps(dst, A, B);
+    tcmmimfp16ps(DST, A, B);
 }
 
 /// Perform matrix multiplication of two tiles containing complex elements and accumulate the results into a packed single precision tile.
@@ -225,19 +214,17 @@ pub unsafe fn _tile_cmmimfp16ps<const dst: i8, const A: i8, const B: i8>() {
 ///
 /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_cmmrlfp16ps&ig_expand=6862)
 #[inline]
-#[allow(non_upper_case_globals)]
 #[rustc_legacy_const_generics(0, 1, 2)]
 #[target_feature(enable = "amx-complex")]
 #[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
-pub unsafe fn _tile_cmmrlfp16ps<const dst: i8, const A: i8, const B: i8>() {
-    static_assert_uimm_bits!(dst, 3);
+pub unsafe fn _tile_cmmrlfp16ps<const DST: i8, const A: i8, const B: i8>() {
+    static_assert_uimm_bits!(DST, 3);
     static_assert_uimm_bits!(A, 3);
     static_assert_uimm_bits!(B, 3);
-    tcmmrlfp16ps(dst, A, B);
+    tcmmrlfp16ps(DST, A, B);
 }
 
 #[allow(improper_ctypes)]
-#[allow(clashing_extern_declarations)]
 extern "C" {
     #[link_name = "llvm.x86.ldtilecfg"]
     fn ldtilecfg(mem_addr: *const i8);