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boot_lnkr5f100le.icf
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//-------------------------------------------------------------------------
// ILINK command file template for RL78 microcontroller R5F100LE.
//
// This file can be used to link object files from the RL78
// Assembler, IASMRL78, and the C/C++ compiler ICCRL78.
//
// This file is generated from the device file:
// DR5F100LE.DVF
// Copyright(C) 2012 Renesas
//
// Core type: s2
//
// Format version 3.00, File version 1.14
//-------------------------------------------------------------------------
define exported symbol __link_file_version_2 = 1;
initialize by copy with simple ranges, packing = auto { rw, R_DATA, R_BSS, R_DATAF, R_BSSF, R_SDATA, R_SBSS };
do not initialize { section *.noinit };
define memory mem with size = 1M;
// Set the symbol __RESERVE_OCD_ROM to 1 to reserve the OCD area for debugging.
// IDE: Symbol can be defined within the project settings here:
// "Project"-->"Options..."->"Linker"-->"Config"-->"Configuration file symbol definitions"
// Symbol definition: __RESERVE_OCD_ROM=1
// Command line: --config_def __RESERVE_OCD_ROM=1
if (isdefinedsymbol(__RESERVE_OCD_ROM))
{
if (__RESERVE_OCD_ROM == 1)
{
reserve region "OCD ROM area" = mem:[from 0x0FE00 size 0x0200];
}
}
define symbol _T01_FSL_RESERVED = 0x400;
define region BOOT0_ROM = mem:[from 0x000D8 to 0x00FFF]; // Bootloader
define region BOOT0_RAM = mem:[from 0xFEF00 + _T01_FSL_RESERVED to 0xFFE1F]; // Bootloader
define region ROM_near = mem:[from 0x02000 to 0x0FFFF];
define region ROM_far = mem:[from 0x02000 to 0x0FFFF];
define region ROM_huge = mem:[from 0x02000 to 0x0FFFF];
define region SADDR = mem:[from 0xFFE20 to 0xFFEDF];
define region RAM_near = mem:[from 0xFEF00 to 0xFFE1F];
define region RAM_far = mem:[from 0xFEF00 to 0xFFE1F];
define region RAM_huge = mem:[from 0xFEF00 to 0xFFE1F];
define region VECTOR = mem:[from 0x00000 to 0x0007F];
define region CALLT = mem:[from 0x00080 to 0x000BF];
define region EEPROM = mem:[from 0xF1000 to 0xF1FFF];
define block NEAR_HEAP with alignment = 2, size = _NEAR_HEAP_SIZE { };
define block FAR_HEAP with alignment = 2, size = _FAR_HEAP_SIZE { };
define block HUGE_HEAP with alignment = 2, size = _HUGE_HEAP_SIZE { };
define block CSTACK with alignment = 2, size = _STACK_SIZE { rw section CSTACK };
define block INIT_ARRAY with alignment = 2, fixed order { ro section .preinit_array,
ro section .init_array };
define block INIT_ARRAY_TLS with alignment = 2, fixed order { ro section .preinit_array_tls,
ro section .init_array_tls };
define block OPT_BYTE with size = 4 { R_OPT_BYTE,
ro section .option_byte,
ro section OPTBYTE };
define block SECUR_ID with size = 10 { R_SECUR_ID,
ro section .security_id,
ro section SECUID };
"RESET":place at address mem:0x00000 { ro section .reset };
"VECTOR":place at address mem:0x00004 { ro section .intvec };
place at address mem:0x000C0 { block OPT_BYTE };
place at address mem:0x000C4 { block SECUR_ID };
if ( _NEAR_CONST_LOCATION_SIZE > 1 )
{
"MIRROR": place in mem:[from _NEAR_CONST_LOCATION_START size _NEAR_CONST_LOCATION_SIZE] with mirroring to (_NEAR_CONST_LOCATION_START | 0xF0000) { ro R_CONST,
ro section .const,
ro section .switch };
define block MIRROR_AREA { };
}
else
{
// Guard to cause an error message if sections are
// linked to a non-existing mirror area.
define block MIRROR_AREA with maximum size = 0 { ro R_CONST,
ro section .const,
ro section .switch };
}
"CALLT":place in CALLT { R_CALLT0, ro section .callt0 };
define block BOOT_BLOCK with fixed order, size = (0x01000-0x000D8) {
ro section FSL_FCD,
ro section FSL_FECD,
ro section FSL_RCD,
ro section FSL_BCD,
ro section FSL_BECD,
ro section .boot,
ro object r_cg_cgc.o,
ro object r_cg_cgc_user.o,
ro object r_cg_serial.o,
ro object r_cg_serial_user.o,
ro object r_cg_timer.o,
ro object r_cg_timer_user.o,
ro object r_systeminit.o,
ro object cstartup.o,
ro object default_handler.o,
ro object l03.o,
ro object hwmdu*.o,
ro object r_main.o,
} except {
ro section OPTBYTE,
ro section SECUID,
};
"BOOT0_ROM": place in BOOT0_ROM { block BOOT_BLOCK };
"BOOT0_RAM": place in BOOT0_RAM { rw section .bootdata };
"ROMNEAR":place in ROM_near { R_TEXT, ro section .text} except {
ro object r_cg_cgc.o,
ro object r_cg_cgc_user.o,
ro object r_cg_serial.o,
ro object r_cg_serial_user.o,
ro object r_cg_timer.o,
ro object r_cg_timer_user.o,
ro object r_main.o,
ro object r_systeminit.o,
ro object l03.o,
ro object hwmdu*.o,
ro object cstartup.o,
ro object default_handler.o, };
"ROMFAR":place in ROM_far { block INIT_ARRAY,
block INIT_ARRAY_TLS,
block MIRROR_AREA,
R_TEXTF_UNIT64KP,
ro section .textf_unit64kp,
ro section .constf,
ro section .switchf,
ro };
"ROMHUGE":place in ROM_huge { ro section .consth,
R_TEXTF,
ro section .textf };
"RAMNEAR":place in RAM_near { block NEAR_HEAP,
block CSTACK,
zi section .iar.dynexit,
R_DATA,
rw section .data,
R_BSS,
rw section .bss*,
rw };
"RAMFAR":place in RAM_far { block FAR_HEAP,
R_DATAF,
rw section .dataf,
rw section .data_unit64kp,
rw section .bss_unit64kp,
R_BSSF,
rw section .bssf* };
"RAMHUGE":place in RAM_huge { block HUGE_HEAP,
rw section .hdata,
rw section .hbss* };
"SADDRMEM":place in SADDR { rw section .sdata,
R_SDATA,
rw section .sbss*,
R_SBSS,
rw section .wrkseg };