Creating your own pcore with nf10_coregen.py tool

There is some ways to create a new pcore and add it to NetFPGA 10G datapath. First of all, its likely starting from some reference project and then:

1. modify an existent pcore, adding your functionality on it;

2. create a set of files and directory structure that will be recognized by Xilinx Platform Studio;

3. use the nf10_coregen.py tool to generate a pcore template where you might add your functionality.

This documentation addresses the third option. You should not assume that this is the main or only way to create a pcore. Also referer to other documentations like Stanford Summer Camp 2013 Slides (section VII) and European Spring Camp 2013 Slides.

This page assumes that you followed the Getting Started Guide and source'd the bashrc_addon_NetFPGA_10G file with your settings.

Creating a new project and pcore

Let's suppose that you what to create a new NIC design called nic_tracer based on Reference NIC which will contain a pcore called packet_tracer placed between the "Output Port Lookup" and "BRAM Output Queues" modules, as illustrated on NetFPGA 10G Reference NIC block diagram.

The process, in a glance, is to copy reference_nic directory, create a pcore with nf10_coregen.py tool and wire up the pcore between nf10_nic_output_port_lookup_v1_10_a and nf10_nic_output_port_lookup_v1_10_a pcores. So, you should:

# cp $NF_ROOT/contrib-projects
# cp -r ../projects/reference_nic nic_tracer
# cd nic_tracer
# $NF_ROOT/tools/scripts/nf10_coregen.py --path hw/pcores --name packet_tracer
[Some info is displayed. Read them :-) ]

Now you should have two files:

# ls hw/pcores/packet_tracer_v1_00_a/hdl/verilog
packet_tracer.v  user_logic.v

The packet_tracer.v is your top module file, which instantiates a "user logic" module and a "ipif_regs" register module.

The "user logic" module behaviour code should be defined within the user_logic.v file.

By default is created one write-only and one read-only registers. You can customize the registers as you wish. See the packet_tracer.v NUM_(RW|WO|RO)_REGS localparams declarations.

Run xps, instantiate and wire the pcore:

# xps hw/system.xmp