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Feature coverage per architecture
The following table shows which features are implemented for which CPU architecture.
feature | 6502 | 65816 | Z80 | 8080 | LR35902 |
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* , *=
|
✔️ | ✔️ | 🐌 | 🐌 | 🐌 |
signed comparisons | ❌ | ❌ | ❌1 | ||
stack variables | ✔️ | ✔️ | ✔️ | 🐌 | 🐌 |
assembly | ✳️2 | 🚧3 | ✔️ | ✔️ | 🚧4 |
other features | ✔️ | 🐌 | ✔️ | ✔️ | ✔️ |
optimization | ✔️ | 🚧5 | 🚧 | 🚧 | 🚧 |
✔️ – implemented
📺 – implemented only for subarchitectures that support it natively
🐌 – implemented, but suboptimal
✳️ – implemented fully for the base architecture, but partially for extensions
🚧 – partially implemented
❌ – not implemented yet
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No hardware support.
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All 6502, 65SC02 and 65CE02 instructions are supported. 65C02 bit setting/testing instructions and some HuC6280 instructions are not supported.
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Some instructions and addressing modes are not supported.
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Instructions with
($FF00+d)
addressing are not supported yet -
Optimized for the processor in the emulation mode used as an accelerator for a 6502-based system. Doesn't utilize its full capabilities in the native mode.
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Implemented features may require a zeropage register on 6502 targets.
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65816 code is quite suboptimal. If you're targeting a 65816 machine only, consider using something else for the time being.
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CPU's from the 6800 and 8086 families might be added in the future.