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Feature coverage per architecture

Karol Stasiak edited this page Jul 23, 2018 · 34 revisions

The following table shows which features are implemented for which CPU architecture.

feature 6502 Z80
+', -', +'=, -'= 📺 ✔️
*, *= ✔️ 🐌
*', *'= 📺
<<', <<'= 📺
>>', >>'= ✔️
signed comparisons ⚠️
assembly ✳️1 🚧2
other features ✔️ ✔️
Legend:

✔️ – implemented
📺 – implemented only for subarchitectures that support it natively
🐌 – implemented, but suboptimal
✳️ – implemented fully for the base architecture, but partially for extensions
🚧 – partially implemented
⚠️ – implemented, but incorrectly
❌ – not implemented yet

Notes:
  1. All 6502, 65SC02 and 65CE02 instructions are supported. 65C02 bit setting/testing instructions, some HuC6280 instructions and some 65816 instructions and addressing modes are not supported.

  2. Bit setting/testing instructions and few other instructions are not supported.

Further remarks

  • Implemented features may require a zeropage register on 6502 targets.

  • 65816 code is quite suboptimal. If you're targeting a 65816 machine only, consider using something else for the time being.

  • Intel 8080 and Gameboy support added right now would mean no support for stack variables.

  • CPU's from the 6800 and 8086 families might be added in the future.

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